Engineer, Product Applications
KLA India · Chennai · On-site
- Applications Engineering
- Semiconductor Inspection
- Metrology
- Advanced Packaging
- +6
0+ yrsNot disclosed
Added by ChipJobs from KLA India's careers page · Posted · 3 days ago
India · Semiconductor only
RTL design and verification, DFT, physical design, analog, process, packaging and embedded silicon. Every listing is entered by hand from the employer’s own careers page or ATS, links back to the employer’s own posting, and is filterable by the skills the role actually needs.
Read by Rishi — 15+ years in VLSI: Synopsys VIP R&D, SoC verification at Google, UCIe Consortium. A JD that wants twenty years of FPGA at entry level, or a DV role filed under RTL design, does not get on the board.
Where each listing came from
Every one was opened by hand on the employer's own careers page or ATS before it published, and links back to that posting. Nothing here is scraped from LinkedIn, Naukri or Indeed.
Pay, stated plainly
Where the employer publishes a range we show it, free. Where they don't, we say so — and name them. Today that is every listing on the board: Indian postings almost never carry a number, because disclosure follows pay-transparency law and India has none.
Chip skills, not keywords
Filter by UVM, ATPG, STA, UPF, litho — the taxonomy the industry runs on. Search “verification” on a general board and you get QA testers.
KLA India · Chennai · On-site
0+ yrsNot disclosed
Added by ChipJobs from KLA India's careers page · Posted · 3 days ago
Cadence Design Systems India · Noida · On-site
2+ yrsNot disclosed
Added by ChipJobs from Cadence Design Systems India's careers page · Posted · 22 days ago
NXP Semiconductors India · Pune · On-site
10+ yrsNot disclosed
Added by ChipJobs from NXP Semiconductors India's careers page · Posted · 24 days ago
Marvell Technology India · Bengaluru · On-site
8+ yrsNot disclosed
Added by ChipJobs from Marvell Technology India's careers page · Posted · 28 days ago
NXP Semiconductors India · Noida · On-site
Not disclosed
Added by ChipJobs from NXP Semiconductors India's careers page · Posted · 34 days ago
Micron Technology India · Hyderabad · On-site
3–4 yrsNot disclosed
Added by ChipJobs from Micron Technology India's careers page · Posted · 35 days ago
Chip engineers find openings fine. What they cannot find out is whether the opening is real, and who is on the other end of the apply button.
Requisitions filled months ago stay live to collect resumes, and reposts look new. Greenhouse's own platform data puts 18–22% of postings in any quarter at roles nobody is trying to fill. From the posting itself there is no way to tell, so you write the cover letter anyway.
One requisition gets shopped by several staffing firms at once — on the incumbent niche board, a single embedded verification role appeared seven times on page one from six vendors, with the employer concealed. You apply to a middleman and never learn whose team it was.
Search “verification” on a general board and you get QA testers. “Layout” returns UI designers. UVM, ATPG, STA, UPF, EUV — the vocabulary the industry runs on is invisible to a platform built for every job in the economy.
We are not trying to have more listings than LinkedIn. We are trying to make every listing worth opening — and to leave the parts we have not built yet visibly unbuilt.
| Factor | ChipJobs | Naukri / Indeed | |
|---|---|---|---|
| Scope | Semiconductor and directly adjacent only — VLSI, EDA, embedded, automotive silicon, packaging. Twelve role families, enforced in code. Nothing else is admitted to the board. | Every industry. | Every industry. |
| Is the role still open? | Every listing was opened by hand on the employer's own careers page or ATS before it published — the first ten on 13 August 2026. Nothing re-checks them automatically yet, and this sentence changes the day that ships. | A posting stays live until the employer removes it. | Same, and reposting an old requisition costs nothing. |
| Where the apply link goes | Straight to the employer's own posting, in a new tab, with the company named. No form we own, no account, no login before you can read the role. All ten listings today came from an employer's careers page or ATS — none from an agency. | Employer postings and staffing-firm reposts of the same requisition sit side by side, undistinguished. | Consultant postings are flagged and a consultancy may name the client it is hiring for. Many do not. |
| Chip skill taxonomy | Filters built on the taxonomy the industry actually uses: RTL, SystemVerilog, UVM, DFT/ATPG, place-and-route, STA, analog, litho, packaging. Every skill filter is a canonical name from a closed list, and the skill links on this page fail the build if one is not. | Keyword match. Search “verification” and you get QA testers. | Keyword match, inside general engineering categories. |
| Salary transparency | Where the employer publishes a range it is on the card, free, with no paywall and no estimate dressed up as a number. Where they don't, the listing says so and the company page prints how many of that employer's live roles disclose. Today that is all ten — an analysis of 2,347 postings found zero disclosed salaries across 263 India listings from 77 multinationals, because disclosure follows pay-transparency law and India has none. | Estimated ranges, behind a paywall. | Usually “not disclosed”. |
| Who reads the posting | An engineer with 15+ years in VLSI opens every posting before it goes live. A JD wanting twenty years of FPGA at entry level, a DV role filed under RTL design, and an apply link that lands on a generic careers homepage are three judgements a general board is not built to make. | Anyone with a card can post. | Anyone with a card can post. |
| Resume database | None. We are new. If you need volume today, we are not it yet — what we have is high-intent and chip-only. | Huge, and noisy. | Large, general-purpose. |
Checking is manual today — a small board and one engineer opening every posting on the employer’s own site. Automatic daily re-checking is not built. When it is, the check date on each listing is how you will know it ran.
The taxonomy covers semiconductors and the work directly adjacent to it — EDA, embedded, automotive silicon, packaging. Nothing else. Each heading is a discipline filter and each chip below it is a single skill; the ones a live listing actually carries are links, and the rest are here to show you where the boundary is.
Your posting is read by chip engineers, not by everyone. Applications arrive from people who know what a UPF file is, which is the whole point of a vertical board. In exchange we ask for a live link to your own careers page, and for the salary range if you publish one.
₹0
launch tier
1 active listing, 30 days
Open now — closes at the end of Month 1
₹2,500
per month
1–3 active listings, 60 days
From Month 2
₹5,000–7,500
per month
3–5 active listings, 60 days
From Month 2
₹15,000–30,000
per month
Unlimited listings, 90 days
From Month 6
Nothing is billable today. The free tier exists to get the first roles on the board and it has a hard expiry — it closes at the end of Month 1. Companies that list during that window keep launch pricing; new companies pay from Month 2. Employer branding (₹5,000–10,000/month) and resume-database seats (₹3,000–5,000/seat/month) open at Month 4.
One email a week: the roles added since the last one, with the salary the employer published where there is one. No digest of jobs you have already seen, and nothing from outside the industry.